1. Technical Field
The present disclosure relates to a nonvolatile semiconductor storage apparatus including a readout circuit that determines data by detecting current that flows when voltage is applied to opposite ends of a memory cell, and to a readout circuit capable of stably determining data even with determination current which differs between a readout operation and a verify operation which is a readout operation for determining rewrite.
2. Description of the Related Art
In recent years, in accordance with growing demands for electronic devices, particularly mobile phones (smartphones), mobile music players, digital cameras, tablet terminals and the like, demands for nonvolatile semiconductor storage apparatuses have also been growing. Technical developments for increasing the capacity, reducing the size, and realizing fast rewrite, fast readout, and operations with reduced power consumption are actively proceeding.
Current mainstream nonvolatile memory is flash memory whose rewrite time is of the order of microseconds or milliseconds, which hinders an improvement in the performance of a device equipped with the nonvolatile memory.
Recently, novel nonvolatile memory capable of achieving rewrite operations at higher speeds and with smaller power consumption as compared to flash memory has been actively developed. Such a memory includes resistive random access memory (ReRAM) using a variable resistance element as a storage element.
There has been provided, as a readout circuit that determines a data state of a memory cell of a nonvolatile semiconductor storage apparatus such as a ReRAM, a method of determining data by: precharging a determining node to supply voltage; and thereafter discharging the determining node through a memory cell while amplifying the voltage difference between voltage of the determining node, which is generated according to a current amount flowing through the memory cell, and the reference voltage to a logic level. Since this method operates relatively at low voltage and high speeds, it is employed as a readout circuit of a nonvolatile semiconductor storage apparatus.
However, with ReRAM, in order to certify the resistance characteristic and ensure the data retaining characteristic after rewrite, a verify operation may be performed. The verify operation is an operation of determining a low resistance state or a high resistance state after a rewrite write operation.
In this case, a determining resistance in a readout operation differs from a determining resistance in a verify operation. Accordingly, in the case where the above-described readout circuit is used in all the readout operation and the verify operation, the voltage transition at the determining node in discharging differs depending on the operation mode. Hence, the timing of amplifying the voltage difference needs to be optimized in each mode. On the other hand, there is a problem that it is difficult to design such a timing generator circuit.
Addressing the problem, there is provided a structure in which a mirror circuit is added separately from a precharging circuit for the determining node, and the operating circuit is switched between a readout operation and a verify operation so that the amplifying timing becomes substantially identical irrespective of the operation mode (PTL 1). However, such a structure newly necessitates the mirror circuit, and therefore has a problem of an increase in the circuit area.
In addition, there have been proposed a structure using a replica circuit as the timing generator circuit (PTL 2) and a structure in which capacity load of the determining node is switched according to the operation mode so that an operation at constant amplifying timing is realized irrespective of the operation mode (PTL 3). However, such structures necessitate complicated circuitry, and are associated with problems such as an increase in the circuit scale and impairment of high speeds in a readout operation.